IP Catalog
austriamicrosystems AG Category: Analog and Mixed Signal
Target Technology: AS Part Number: FLASH6.C35 - The Macro Cell FLASH6.C35 is a 6-bit single step parallel analog to digital converter. The architecture is based on a ... Category: Other
Target Technology: AS Part Number: SCADC12F.C35 - The Macro Cell SCDAC12F.C35 is a 12-Bit SAR analog to digital converter. The architecture is based on a charge ... Category: Other
Target Technology: AS Part Number: ADC1020.C35 - The Macro Cell ADC1020.C35 is a 10-bit high-speed piplined ADC core cell with sampling rates up to 20MSamples/sec. It ... Category: Other
Target Technology: AS Part Number: ADC1220.C35 - The Macro Cell ADC1220.C35 is a 12-bit high-speed pipelined ADC core cell with sampling rates up to 20MSamples/sec. It ... Category: Other
Target Technology: AS Part Number: CDAC10.C35 - The Macro Cell CDAC10.C35 is a 10-bit digital to analog converter based on a current steering architecture. The cell ... Category: Other
Target Technology: AS Part Number: CDAC12.C35 - The CDAC12 is a 12-bit high-resolution high-speed CMOS digital-toanalog converter (DAC). The CDAC12 uses a segmented ... Category: Other
Target Technology: AS Part Number: LVDS_TX - CMOS LVDS Transmitter - The LVDS_TX is a differential line driver designed for applications requiring high data rates. The device supports data ... Category: Other
Target Technology: AS Part Number: LVDS_RX - CMOS LVDS Receiver - The LVDS_RX is a differential line receiver designed for applications requiring high data rates. The device supports ... Category: Other
Target Technology: AS Part Number: PECL_TX - CMOS PECL Transmitter - The PECL_TX is a differential 3.3 V PECL transmitter featuring a transmission speed of 622 Mb/s with standard F100K ... Category: Other
Target Technology: AS Part Number: PECL_RX - CMOS PECL Receiver - The PECL_RX is a 3.3 V PECL differential line receiver featuring an operating frequency up to 311 MHz (622 Mb/s) and ... Category: Other
Target Technology: AS Part Number: Single Port RAM in 0.8 µm CMOS - The SPRAM compiler system enables automatic generation of single port RAM blocks for the configurations shown above. All ... Category: Other
Target Technology: AS Part Number: Single Port RAM in 0.35µm CMOS (C35) - The SPRAM memory compiler system enables automatic generation of single port RAM blocks for the configurations shown ... Category: Other
Target Technology: AS Part Number: Dual Port RAM in 0.35µm CMOS (C35) - The DPRAM memory compiler system enables automatic generation of dual port RAM blocks for the configurations shown ... Category: Memory
Target Technology: AS Part Number: ROM in 0.8 µm CMOS - The ROM compiler system enables automatic generation of ROM memory blocks for the configurations shown above. All ... Category: Memory
Target Technology: AS Part Number: diffusion programmable ROM in 0.35µm CMOS (C35) - The diffusion ROM memory compiler system enables automatic generation of ROM blocks for the configurations shown above. ... Category: Other
Target Technology: AS Part Number: Metal Programmable ROM8kx8 in 0.35µm CMOS (C35/S35) - This instance is a VIA1 programmable ROM device. The instance is not included in a HIT-Kit shipment. Memory Simulation ... Category: Memory
Target Technology: AS Part Number: Metal Programmable ROM16kx8 in 0.35µm CMOS (C35/S35) - This instance is a VIA1 programmable ROM device. The instance is not included in a HIT-Kit shipment. Memory Simulation ... Category: Other
Target Technology: Memo Part Number: Metal Programmable ROM128kx8 in 0.35µm CMOS (C35/S35) - This instance is a VIA1 & MET1 programmable ROM device. The 2 layer programming concept guarantees a high density ROM ... Category: Other
Target Technology: Memo Part Number: Single Port RAM 2kx8 in 0.35µm CMOS (C35/S35) - This SPRAM block includes an area optimized architecture. Instances generated with the flexible compiler system are ... Category: Other
Target Technology: AS Part Number: BIST for single port RAM in 0.35µm CMOS (C35/S35) - BIST structure generation is an additional service to the generation of RAM instances. Data is provided on a placement ... |
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